Nuclear Science and Techniques

《核技术》(英文版) ISSN 1001-8042 CN 31-1559/TL     2019 Impact factor 1.556

Nuclear Science and Techniques ›› 2019, Vol. 30 ›› Issue (8): 127 doi: 10.1007/s41365-019-0643-x


Study of the retina algorithm on FPGA for fast tracking

Zi-Xuan Song1, 2 Wen-Di Deng1, 2 G. De LENTDECKER2 Guang-Ming Huang1 Hua Pei1 Yifan Yang2 Dong Wang1 F. ROBERT2   

  1. 1Central China Normal University, Wuhan Hubei 430079, China
    2Universite libre de Bruxelles, Av. F.Roosevelt 50, 1050 Brussels, Belgium
  • Received:2019-02-02 Revised:2019-04-28 Accepted:2019-04-29
  • Contact: Gilles De Lentdecker
  • Supported by:
    This work was supported by the National Key Research and Development Program of China (No. 2016YFE0100900), Fundamental Research Funds for the central universities (No. 2018YBZZ082) and National Science Funds of China (No. 11505074) and Belgian FRS-FNRS.
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Zi-Xuan Song, Wen-Di Deng, G. De LENTDECKER, Guang-Ming Huang, Hua Pei, Yifan Yang, Dong Wang, F. ROBERT. Study of the retina algorithm on FPGA for fast tracking.Nuclear Science and Techniques, 2019, 30(8): 127     doi: 10.1007/s41365-019-0643-x

Abstract: Real-time track reconstruction in high-energy physics experiments at colliders running at high luminosity is very challenging for trigger systems. To perform pattern recognition and track fitting, artificial retina or Hough transformation algorithms have been introduced to the field typically implemented on state-of-the-art field programmable gate array (FPGA) devices. In this paper, we report on two FPGA implementations of the retina algorithm: one using a mixed Floating-Point core and the other using Fixed-Point and Look-Up Table, and detailed measurements of the retina performance are investigated and compared. So far, the retina has mainly been used in a detector configuration comprising parallel planes, and the goal of our work is to study the hardware implementation of the retina algorithm and estimate the possibility of using such a method in a real experiment.

Key words: Fast tracking, Field programmable gate array, Trigger