Nuclear Science and Techniques

《核技术》(英文版) ISSN 1001-8042 CN 31-1559/TL     2019 Impact factor 1.556

Nuclear Science and Techniques ›› 2015, Vol. 26 ›› Issue (5): 050502 doi: 10.13538/j.1001-8042/nst.26.050502

• NUCLEAR PHYSICS AND INTERDISCIPLINARY RESEARCH • Previous Articles     Next Articles

Scalability of 3D deterministic particle transport on the Intel MIC architecture

Wang Qing-Lin, 1 Liu Jie, 1 Gong Chun-Ye, 2 Xing Zuo-Cheng 1   

  1. 1Science and Technology on Parallel and Distributed Processing Laboratory, National University of Defense Technology, Changsha 410073, China
    2Science and Technology on Space Physics Laboratory, Beijing 100076, China
  • Contact: Wang Qing-Lin E-mail:wangqinglin.thu@gmail.com
  • Supported by:

    Supported by National Natural Science Foundation of China (Nos. 61402039, 61170083, 60970033, 61373032 and 91430218), National High Technology Research and Development Program of China (No. 2012AA01A301), China Postdoctoral Science Foundation (No. 2014M562570) and National Key Basic Research Program of China (No. 61312701001)

Wang Qing-Lin, Liu Jie, Gong Chun-Ye, Xing Zuo-Cheng . Scalability of 3D deterministic particle transport on the Intel MIC architecture.Nuclear Science and Techniques, 2015, 26(5): 050502     doi: 10.13538/j.1001-8042/nst.26.050502

Abstract:

The key to large-scale parallel solutions of deterministic particle transport problem is single-node computation performance. Hence, single-node computation is often parallelized on multi-core or many-core computer architectures. However, the number of on-chip cores grows quickly with the scale-down of feature size in semiconductor technology. In this paper, we present a scalability investigation of one energy group time-independent deterministic discrete ordinates neutron transport in 3D Cartesian geometry (Sweep3D) on Intel’s Many Integrated Core (MIC) architecture, which can provide up to 62 cores with four hardware threads per core now and will own up to 72 in the future. The parallel programming model, OpenMP, and vector intrinsic functions are used to exploit thread parallelism and vector parallelism for the discrete ordinates method, respectively. The results on a 57-core MIC coprocessor show that the implementation of Sweep3D on MIC has good scalability in performance. In addition, the application of the Roofline model to assess the implementation and performance comparison between MIC and Tesla K20C Graphics Processing Unit (GPU) are also reported.

Key words: Particle transport, Discrete ordinates method, Sweep3D, Many Integrated Core (MIC), Scalability, Roofline model, Graphics Processing Unit (GPU)