Nuclear Science and Techniques

《核技术》(英文版) ISSN 1001-8042 CN 31-1559/TL     2019 Impact factor 1.556

Nuclear Science and Techniques ›› 2010, Vol. 21 ›› Issue (1): 44-48 doi: 10.13538/j.1001-8042/nst.21.44-48

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Design and test results of a low-noise readout integrated circuit for high-energy particle detectors

ZHANG Mingming CHEN Zhongjian* ZHANG Yacong LU Wengao JI Lijiu   

  1. Key Laboratory of Microelectronic Devices and Circuits, Institute of Microelectronics, Peking University, Beijing, 100871, China
ZHANG Mingming, CHEN Zhongjian, ZHANG Yacong, LU Wengao, JI Lijiu. Design and test results of a low-noise readout integrated circuit for high-energy particle detectors.Nuclear Science and Techniques, 2010, 21(1): 44-48     doi: 10.13538/j.1001-8042/nst.21.44-48

Abstract:

A low-noise readout integrated circuit for high-energy particle detector is presented. The noise of charge sensitive amplifier was suppressed by using single-side amplifier and resistors as source degeneration. Continuous-time semi-Gaussian filter is chosen to avoid switch noise. The peaking time of pulse shaper and the gain can be programmed to satisfy multi-application. The readout integrated circuit has been designed and fabricated using a 0.35 μm double-poly triple-metal CMOS technology. Test results show the functions of the readout integrated circuit are correct. The equivalent noise charge with no detector connected is 500–700 e in the typical mode, the gain is tunable within 13–130 mV/fC and the peaking time varies from 0.7 to 1.6 μs, in which the average gain is about 20.5 mV/fC, and the linearity reaches 99.2%.

Key words: High-energy particle detectors, Readout circuit, Low noise, ASIC