Nuclear Science and Techniques

《核技术》(英文版) ISSN 1001-8042 CN 31-1559/TL     2019 Impact factor 1.556

Nuclear Science and Techniques ›› 2013, Vol. 24 ›› Issue (2): 020401 doi: 10.13538/j.1001-8042/nst.2013.02.003


An improved technology for eliminating nondeterministic latency in the L1 trigger system

DU Zhongwei1,2  SU Hong2,*  KONG Jie2  ZHAO XingwenQIAN Yi2     

  1. 1State Key Laboratory of Particle Detection & Electronics, University of Science and technology of China, Hefei 230026, China
    2Institute of Modern Physics, Chinese Academy of Sciences, Lanzhou 730000, China
  • Received:2012-08-10
  • Contact: SU Hong
  • Supported by:

    Supported by the Important Direction Project of the CAS Knowledge Innovation Program (No. KJCX2-YW-N27); the National Natural Science Foundation of China (No. 11079045)

DU Zhongwei, SU Hong, KONG Jie, ZHAO Xingwen, QIAN Yi. An improved technology for eliminating nondeterministic latency in the L1 trigger system.Nuclear Science and Techniques, 2013, 24(2): 020401     doi: 10.13538/j.1001-8042/nst.2013.02.003


Gamma Ray Array Detector (GRAD) is one of external target facility subsystems in the Cooling Storage Ring on the Heavy Ion Research Facility at Lanzhou (HIRFL-CSR). The trigger subsystem of GRAD is required to make a fast L1 trigger decision with a fixed latency for the data acquisition. Because the hit signals from the detector are asynchronous with the local clock of the trigger system, a nondeterministic latency (the value changes between zero and one clock period) is generated when the synchronous receivers of the conventional trigger system process the hit signals. In this paper, an improved trigger logic based on a field-programmable gate array is developed, and comprised of zero-delay broadening circuits as receivers and an improved adding circuit designed for the new receivers. Software simulation and experimental measurement have been conducted. Comparison with the conventional trigger logic, the improved trigger logic has the advantage of eliminating the nondeterministic latency and reducing the total processing latency.

Key words: Nondeterministic latency , Field-programmable gate array , L1 trigger , Zero-delay broadening