Nuclear Techniques ›› 2020, Vol. 43 ›› Issue (3): 30402-030402.doi: 10.11889/j.0253-3219.2020.hjs.43.030402

• NUCLEAR ELECTRONICS AND INSTRUMENTATION • Previous Articles     Next Articles

Design and implemention of sub-trigger system for CSR external target γ detection

Haisheng SONG1,Fengjiao SU1,2,Xianqin LI2,Qi ZHANG3,Yong CHEN3,Duo YAN2,Haibo YANG2(),Jie KONG2,Hong SU2   

  1. 1.Northwest Normal University, Lanzhou 730070, China
    2.Institute of Modern Physics, Chinese Academy of Sciences, Lanzhou 730000, China
    3.Harbin Institute of Technology, Harbin 150001, China
  • Received:2019-11-22 Revised:2020-02-09 Online:2020-03-15 Published:2020-03-24
  • Contact: Haibo YANG E-mail:yanghaibo@impcas.ac.cn
  • About author:SONG Haisheng, male, born in 1964, graduated from Northwest Normal University, focusing on computer measurement and control
  • Supported by:
    National Natural Science Foundation of China(11664036);Lanzhou Regional Center Funding(2020g101)

Abstract: Background

The gamma detection array is an important device in the heavy ion research facility at Lanzhou - cooling storage ring (HIRFL-CSR). In order to eliminate invalid information such as background noise in the experiment, to ensure that subsequent physical analysis can be performed efficiently, a sub-trigger selection system needs to be designed for CSR external target γ detection array.

Purpose

This study aims to design aforementioned sub-trigger system for selectable interesting signal in the events recorded by the gamma detector.

Methods

Based on flash-based field programmable gate array (FPGA), this sub-trigger system mainly consisted of the optical fiber interface and the Ethernet interface. The former was used for signal transmission with global trigger and system, and the latter was used to communicate with host computer. Experimental tests were carried out to evaluate the performance of the sub-trigger system.

Results & Conclusions

The test results show that this sub-trigger system is suitable for external target experiment.

Key words: External target experiment, Sub-trigger selection system, Flash-type FPGA, Optical port, Ethernet, Performance test

CLC Number: 

  • TL8